Νέες σειρές καρτών γραφικών από AMD, Nvidia και Intel

[GgeorgG]

αυτες αν βγουν θα βγουν για εναν και μονο σκοπο. να σε αφησουν αφραγκο

[konig]

https://www.chiphell.com/thread-2274669-1-1.html

πωωωω καλα δεν θα τις δουμε ποτε

η 6800 ειναι 1.8 φορες πιο γρηγορη σε cryptomining απο την 3090

[uncharted]

Άνοδος cryptos, lockdowns -> η τέλεια καταιγίδα σχηματίζεται σιγά-σιγά...

[psolord]

NVIDIA to launch GeForce RTX 3080 Ti in January

- - - Updated - - -

https://twitter.com/kopite7kimi/stat...25321422868480

The mining perf of 6800 XT is a bit higher than 5700 XT, much lower than RTX 3080.
Is that a good news?

[Erebos]

NVIDIA to launch GeForce RTX 3080 Ti in January

- - - Updated - - -

https://twitter.com/kopite7kimi/stat...25321422868480

The mining perf of 6800 XT is a bit higher than 5700 XT, much lower than RTX 3080.
Is that a good news?

https://twitter.com/ggng09159189/sta...93544734478340

the hashrates of these cards are not yet final as they're not very well optimized for mining as far as algorithms and mining software optimizes for them , the 1.6gb/s infinite cache will definitely blow out the rtx 3090 in mining performance

[psolord]

Ας ελπισουμε να προλαβουμε πριν γινουν optimized τοτε!

[uncharted]

Υπάρχουν αλγόριθμοι που είναι φτιαγμένοι ειδικά για την L3 των Zen 2.

Κάτι ανάλογο θα γίνει κι εδώ λογικά...

[psolord]

https://twitter.com/i/web/status/1327355421426937856

[konig]

@uncharted

Spoiler:

The command processor and scheduling logic translate higher-level API commands into compute tasks. These compute tasks in turn
are implemented as compute arrays and managed by the Asynchronous Compute Engines (ACE). Each of the four ACEs maintains an
independent stream of commands and can dispatch wavefronts to the compute units.
The impressive 120 CUs of the AMD CDNA architecture are organized into four arrays of CUs. The CUs are derived from the earlier GCN
architecture and execute wavefronts that contain 64 work-items. However, the CUs are enhanced with new Matrix Core Engines that are
optimized for operating on matrix datatypes, boosting compute throughput and power efficiency.
The classic GCN compute cores contain a variety of pipelines optimized for scalar and vector instructions. In particular, each CU contains
a scalar register file, a scalar execution unit, and a scalar data cache to handle instructions that are shared across the wavefront, such as
common control logic or address calculations. Similarly, the CUs also contain four large vector register files, four vector execution units that
are optimized for FP32, and a vector data cache. Generally, the vector pipelines are 16-wide and each 64-wide wavefront is executed over
four cycles.
The AMD CDNA architecture builds on GCN’s foundation of scalars and vectors and adds matrices as a first class citizen while
simultaneously adding support for new numerical formats for machine learning and preserving backwards compatibility for any software
written for the GCN architecture. These Matrix Core Engines add a new family of wavefront-level instructions, the Matrix Fused Multiply-
Add or MFMA. The MFMA family performs mixed-precision arithmetic and operates on KxN matrices using four different types of input
data: 8-bit integers (INT8), 16-bit half-precision FP (FP16), 16-bit brain FP (bf16), and 32-bit single-precision (FP32). All MFMA instructions
produce either 32-bit integer (INT32) or FP32 output, which reduces the likelihood of overflowing during the final accumulation stages of a
matrix multiplication.
The different numerical formats all have different recommended applications. The industry generally agrees that INT8 numerics are
primarily useful for ML inference with quantized weights or data and have the best throughput and lowest memory usage. In contrast,
most ML training and some HPC applications use IEEE FP32 data by default, with 8-bits allocated to the exponent for range and 23-bits
for the mantissa to capture precision. FP16 is another IEEE standard that was designed specifically for graphics workloads and uses a 5-bit
exponent, and a 10-bit mantissa. While FP16 is much more efficient than FP32, the reduced range doesn’t always work out-of-the-box
for ML training – sometimes the algorithms need to be adjusted to avoid overflow and convergence problems. The bfloat16 format strikes
a compromise, using the 10-bit exponent of FP32, but truncating the mantissa to 5-bits. The bf16 numerics are more easily used for ML
training, with few convergence problems.

[uncharted]

Ναι, τι;

[psolord]

Δυο μέρες έμειναν για τα reviews.

Κάνα εξάμηνο για διαθεσιμότητα! Καλό Πάσχα με το αρνί που ελπίζω να δούμε φέτος!

[uncharted]

Paper launch κι εδώ:

https://twitter.com/VideoCardz/statu...92031161044993

- - - Updated - - -

https://wccftech.com/amd-radeon-rx-6...-launch-stock/

[badweed]

Off Topic

θυμηθηκα εποχες πριν 30-40 χρονια , που προιοντα κυκλοφορουσαν στην αμερικη και ερχοντουσαν εδω 2-3 χρονια μετα .
πως αλλαζουν ετσι οι καιροι ...

[uncharted]

Off Topic

θυμηθηκα εποχες πριν 30-40 χρονια , που προιοντα κυκλοφορουσαν στην αμερικη και ερχοντουσαν εδω 2-3 χρονια μετα .
πως αλλαζουν ετσι οι καιροι ...

Παγκοσμιοποίηση γαρ! Με πολλά προϊόντα συνέβαινε αυτό.

[psolord]

Off Topic

θυμηθηκα εποχες πριν 30-40 χρονια , που προιοντα κυκλοφορουσαν στην αμερικη και ερχοντουσαν εδω 2-3 χρονια μετα .
πως αλλαζουν ετσι οι καιροι ...

Δε ξέρω τι λες, εγώ την πρώτη 3dfx Voodoo την είχα πάρει μπαμ με το που βγήκε. To ίδιο και τις επόμενες!

Πολύ φοβάμαι ότι τώρα θα περιμένουμε περισσότερο!